Complexity Control for H.264 Video Coding on RISC processors

ABSTRACT

Mobile multimedia is a rising trend. Related research and application topics attract more and more attention. The expectation for a mobile device is light, thin, small, but powerful enough to support the increasing number of multimedia functions, such as photo capture and display, real-time video communications, and movies and TV display. To support these operations with high computing and high bandwidth requirements on a mobile device with limited energy, the power aware design concept is applied for achieving power optimization.

A power aware video coding system is not only a conventional low power design, but also a design that can adaptively adjust its encoding complexity based on the remaining battery supply to prolong the battery life.

We develop a parametric video encoding architecture, which is fully scalable in power consumption, and import a quality metric for subjective video quality measure. we establish a power-rate-distortion model of the video encoding system. The system is able to adjust its complexity control parameters based on the available energy supply of the mobile device while maximizing the picture quality.

A development platform based on the Intel Xscale microprocessor has been developed. SAD (sum of absolute difference) function is accelerated by assembly code to reduce encoding time. Experiments show that the system is able to save up to 75% power consumption in video coding based on this model.