H.263 is a video coding standard that can be used for audio-visual services at low bitrates. In this work, we implement H.263 on LSI PCI/C80 application board, which consists of a TI TMS320C80 processor and I/O devices. The objectives of this work are to evaluate the feasibility of parallel processing on H.263 and achieve the best performance in terms of the frame rate with acceptable quality.

We speed up the encoder from two different aspects, algorithms and parallel processing. H.263 employs a lot of computation intensive operations, such as motion estimation, DCT and IDCT. We use the three-step and PHODS (parallel hierarchical one-dimensional search) motion estimation algorithms instead of the full search to reduce computation complexity. The original floating-point DCT algorithm is also replaced by the fixed-point method. In addition, we analyze the data dependency of H.263 encoding algorithm and divide it into three different tasks. Subsequently, the tasks are executed in parallel with Main Processor (MP) and four Parallel Processors (PPs) by proper task scheduling.

In the experiment, we capture the video sequence directly via the Video Input Module (VIM) and then compress it. Finally the decoded video is displayed in VGA monitor. The results reach 2.24~2.34 fps at encoder and 9~12 fps at decoder for QCIF (176x144) video sequences. In summary, we have successfully provided the practical video codec infrastructure of video conferencing system on PCI/C80.